Imagination's MIPS® architecture is a simple, streamlined, highly scalable RISC architecture that is available for licensing as a standard intellectual property product. Over time, the architecture has evolved, acquired new technologies and developed a robust ecosystem and comprehensive industry support. Its fundamental characteristics - such as the large number of registers, the number and the character of the instructions, and the visible pipeline delay slots - enable the MIPS architecture to deliver the highest performance per square millimeter for licensable IP cores, as well as high levels of power efficiency for today's SoC designs.
MIPS architecture products include:
- The MIPS32® and MIPS64® instruction-set architectures, which are seamlessly compatible, allow customers to port from one generation to the next while preserving their investment in existing software
- microMIPS®, a code compression Instruction Set Architecture (ISA) comprised of 16- and 32- bit instructions, that provides similar performance to MIPS32 with a code size reduction of up to 35%
- Architecture modules that are encompassed as part of the base architecture, including SIMD (Single Instruction Multiple Data operation), Virtualization, multi-threading (MT) and DSP technologies
Can make a single processor core appear and function like multiple separate cores for improved performance and efficiency.
Find out more about MIPS Multi-threading
SIMD (Single Instruction Multiple Data)
Improves performance by allowing efficient parallel processing of vector operations.
Find out more about MIPS SIMD
Provides enhanced security features and support for multiple operating systems.
Find out more about MIPS Virtualization
DVDs, digital cameras, residential gateways and VoIP phones are examples of the growing list of consumer products that require an increasing amount of signal and media processing horsepower.
Find out more about DSP Technology
- Application-specific extensions (ASEs) boost performance for specific types of applications.
- SmartMIPS® ASE, enables security in smart cards and other secure data applications
- MIPS16e® code compression ASE, reduces memory requirements by as much as 40 percent
- MIPS-3D® ASE provides a cost-effective and an efficient way to achieve high-performance 3D geometry processing within the context of a MIPS64® architecture.
- MIPS® MCU provides enhanced handling of memory-mapped I/O registers and lower interrupt latencies.
The MIPS architecture is one of the most widely supported of all processor architectures, with a broad infrastructure of standard tools, software and services to help ensure rapid, reliable, cost-effective development. Microprocessor developers who want maximum flexibility from processor IP have a solution in the industry-standard MIPS® architecture.