When we first introduced the breakthrough MIPS Warrior family, we promised to deliver a disruptive and comprehensive roadmap of 32 and 64-bit CPUs that incorporate new, innovative architectural features and provide best-in-class performance and efficiency for a wide range of applications.

The first CPU we launched was MIPS P5600, a high-end 32-bit processor targeting ultimate performance in apps processors for mobile, home entertainment, home networking, automotive and many other markets. You can read more about how this powerful CPU can be integrated in a high-end mobile SoC in this blog article.

Today however we are focusing on 64-bit computing, a segment that has been again buzzing with excitement ever since Dave Burke from Google introduced Android L at Google I/O 2014. Android L is the latest iteration of the well-known operating system designed to support three main 64-bit CPU architectures, including MIPS64.

The CPU we are introducing today is MIPS I6400, a brand new design that is the embodiment of the performance efficiency principles that have defined the MIPS architecture. Read on for more on how this CPU outperforms the competition, what new and unique features we’ve implemented and where it fits in the larger Imagination story.

MIPS I6400 at a glance: MIPS64, simultaneous multithreading and hardware virtualization

MIPS I6400 is the industry’s first 64-bit CPU IP core to combine several innovative technologies in a compact yet very powerful processor. It is a dual-issue, in-order design that features simultaneous multithreading (SMT) and a state-of-the-art microarchitecture based on MIPS64 Release 6, the latest version of the highly successful MIPS64 architecture. This new 64-bit MIPS CPU comes packed with high-end features such as advanced hardware virtualization capabilities and a fast SIMD engine based on our MIPS SIMD Architecture (MSA).

 MIPS I6400 - CPU-block_diagram_fThe new I-class MIPS I6400 CPU features a number of microarchitectural improvements

MIPS I6400 represents a new generation of multi-threaded CPUs. L2 cache and system memory performance see a dramatic increase thanks to lower latency, wider buses and improved pre-fetch techniques. We’ve also made enhancements to our branch prediction, implemented advanced load/store bonding and included a high-performance, IEEE 754-2008 compliant, 128-bit SIMD engine.

Leading performance in smaller area and at lower power

MIPS I6400 is a highly efficient CPU that scales very well across many markets, offering high-end performance in a small area footprint (1 mm2 of silicon, when implemented in 28nm) and at lower power consumption versus the competition.

Thanks to an advanced feature set, MIPS I6400 is an absolute performance leader in its class; it offers up to 70% higher performance than competing cores. For example, a single core, dual-threaded MIPS I6400 CPU is more than 30 to 50% faster (DMIPS per MHz or CoreMark) than a competing 64-bit CPU, while occupying a similar area.

MIPS-I6400-benchmark-performance-CoreMark-DMIPS-relativeMIPS I6400 CPU is an absolute leader in performance, power and area for its class

These ground-breaking results are achieved for both CPU-specific and general system workloads across many benchmarks. It is well known that many companies deliver real world performance notably below what they claim in benchmarks. We pride ourselves in creating processor IP that has been designed for superior real world performance and we always offer credible benchmarking data.

MIPS I6400 includes state of the art technologies like SIMD and multi-threading that make a big difference for Linux-based operating systems (Android, Firefox OS, Tizen, etc.) and the most widely used applications in mobile such as web browsing and multimedia processing.

Preliminary results for I6400 show that adding a second thread leads to performance increases of 40-50% on SPECint or CoreMark, with less than 10% cluster area increase.

Building a complete next-generation platform for 64-bit computing

Imagination understands the complexities of designing and scaling CPUs for a range of applications, from multi-threading to multicore to multi-cluster. Our new MIPS I6400 CPU includes up to four threads per core and can be integrated in clusters that feature up to six cores. These threads enable the execution of multiple instructions from multiple threads for every clock cycle.

The diagram below shows an example of a high performance, low power configuration where four MIPS I6400 CPUs are configured to run at top frequencies for demanding workloads while the other two are clocked significantly lower to save power and handle less taxing tasks.

MIPS I6400 - coherent multicore cluster_fA cluster containing several MIPS I6400 CPUs, a coherence manager and additional controllers or registers

This configuration creates the basis of a true heterogeneous design. System architects can build next generation SoCs that include several MIPS processor clusters, PowerVR multimedia processors (graphics, video, vision) and an Ensigma connectivity engine. The figure below shows how companies can combine our hardware IP to devise an apps processor for mobile and consumer applications.

 MIPS I6400 CPU - SoC using Imagination_IP_finalWe have a rich portfolio of silicon IP for next-generation 64-bit processors

We’ve dedicated a lot of time and effort optimizing our IP for a range of operating systems. For example, we have been working closely with Google to make sure that every iteration of Android (including the forthcoming Android L) runs optimally on our MIPS architectures.

The MIPS Release 6 architecture sees the introduction of new instructions that accelerate performance in several key areas and workloads related to Android: JIT compilation, Javascript, web browsing, PIC (Position-Independent Code – the result of Android compilation).

32- and 64-bit application binaries run perfectly on MIPS64 CPUs, without the need for separate ISAs or any mode switching. Furthermore, the newly-formed prpl foundation is also helping to drive ecosystem initiatives and developments for MIPS 32 and 64-bit cores, leveraging the developer community to drive MIPS forward into next generation devices and markets.

Final words

Based on the proven and high performance MIPS64 architecture, the MIPS I6400 CPU is designed to address the migration to 64-bit computing across a range of applications, including mobile, home entertainment, automotive, networking, storage and many more.

There are already multiple licensees across multiple markets for this processor and many others actively engaged, being drawn in by the numerous technical advantages and the benefit of a broad, well-established 64-bit software and tools ecosystem that already exists around MIPS.

64-bit MIPS CPUs have been in use for over 20 years in everything from game consoles to ultra-high performance networking equipment. For two decades, we have been innovating in 64-bit CPU technology, all leading up to the launch of this new I-class MIPS design.

Finally, we’re keeping to our tradition of celebrating MIPS announcements with a different take on the Android robot. If last time we gave it a taste of our ray tracing technology, now we’re staying true to the classical version while adding a few Warrior-esque elements.

MIPS I6400 - Android robotThe custom Android robot* is back!

What do you think of our new MIPS I6400 CPU? What are the areas where you think multi-threading and multicore will be used? Leave us a comment in the box below.

Editor’s note

  • SPECint is a benchmark maintained by the Standard Performance Evaluation Corporation (SPEC) and tests CPU integer performance.
  • CoreMark is a simple, yet sophisticated benchmark developed by EEMBC and designed specifically to test the functionality of a CPU.
  • DMIPS is a common representation of the Dhrystone benchmark obtained when the Dhrystone score is divided by 1757.

* The custom Android robot is based on an original design by deviantART artist Irskaad

About the author: Alex Voica

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Before deciding to pursue his dream of working in technology marketing, Alexandru held various engineering roles at leading semiconductor companies in Europe. His background also includes research in computer graphics and VR at the School of Advanced Studies Sant'Anna in Pisa. You can follow him on Twitter @alexvoica.

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