13th March 2002

PowerVR® MBX Provides Landmark Performance for Embedded Graphics and Video

Family of Cores for Mobile, PDA, STB and CIS Applications


March 13, 2002: PowerVR Technologies, a division of Imagination Technologies, the leading provider of human computer interface intellectual property (IP), will be demonstrating its PowerVR MBX core for embedded graphics applications at CeBIT 2002. PowerVR MBX will enable the migration of modern 3D and video graphics content to embedded platforms including mobile devices, personal digital assistants, set-top boxes and car information and entertainment systems.

The PowerVR MBX family of off-the-shelf embedded 3D, 2D and video acceleration cores includes: PowerVR MBX Pro for very high-performance high-end 2D/3D graphics enabled set-top boxes and home entertainment systems; PowerVR MBX with best area/performance for power-critical handheld devices and mainstream set-top boxes; and PowerVR MBX Lite for the most power-critical, cost-sensitive, entry-level mobile applications.

PowerVR MBX is a complete 2D/3D graphics solution for future wireless multimedia devices optimised for low power and high performance. The demonstration platform consists of an ARM 920 processor with PowerVR MBX in FPGA technology, with a 320×240 LCD display, and clearly demonstrates the high performance and market leading image quality of an ARM / PowerVR Technologies 2D/3D graphics solution.

Imagination Technologies expects that the PowerVR MBX technology, which is available for licensing from ARM for integration with ARM cores and is a key component of the STMicroelectronics Pocket Multimedia (PMM) platform, will become the leading graphics solution for next generation mobile computing and communication devices. A companion vertex geometry processor (VGP) is also available for transform and lighting (T&L) operations.

John Metcalfe, VP Business Development, PowerVR Technologies says: PowerVR MBX has remarkable competitive strengths with all the inherent benefits of PowerVR, including low memory bandwidth requirements, exceptional image quality and performance as well as low-power demands.

PowerVR MBX, implemented in 0.13-micron process, will feature high-performance 3D, 2D and video graphics processing (up to 4 million triangles/second at 120 MHz) in a small area (around 6mm2 of silicon in an SoC solution), with exceptionally low-power consumption (less than 60 mW at a clock speed of 50 MHz). Because PowerVR’s processing architecture minimizes external memory bandwidth requirements it is ideal for use in System on Chip (SoC) solutions integrated alongside a microprocessor and a single unified memory architecture.

PowerVR MBX Features
PowerVR MBX includes all the features of the latest generation of PowerVR technology including:

  • Scene Manager™ – seamless scene complexity management to support arbitrarily complex scenes in limited memory footprint applications
  • FSAA4Free™ – full screen anti aliasing with no performance loss delivers a significant improvement in visual quality by using high resolution rendering and filtered scaling. The result is smoother, more realistic graphics at mobile resolutions
  • ITC™ – Internal True Colour operations performed on chip at 32 bpp for superior colour precision
  • PVR-TC™ – PowerVR Texture Compression
  • AHB Interface for ARM bus architectures
  • Optimisation for UMA (Unified Memory Architectures)

PowerVR MBX also enables all key 3D features, including: Flat and Gouraud shading; Perspective texturing and shading; Specular highlights; 2 Layer Multitexturing support; Full tile blend buffer; Effective fill rates that increase with 3D complexity; Per vertex fog; 16-bit textures; 32-bit textures; Point, bilinear, trilinear and anisotropic filtering; Full range of blend modes; Alpha test.

PowerVR Technologies designs 2D and 3D graphics technologies for use across a wide variety of consumer platforms, from games consoles, arcade machines and personal computers to mobile devices and set top boxes. The PowerVR approach to 3D graphics starts from the premise that taking a different algorithmic approach to 3D processing can eliminate all redundant processing and memory bottlenecks. This revolutionary approach keeps as much processing as possible on-chip minimising costly accesses to off chip memory and improving performance. This unique technique of tile-based deferred texturing has been successfully patented worldwide.


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